It is desirable to test and burn-in semiconductor devices before they are assembled onto multichip modules, or in some cases into single chip packages. Traditionally, all semiconductor dice are probed individually before assembly, while critical devices are burned in under accelerated aging conditions after packaging to minimize the risk of subsequent system failure. Burn-in is performed to screen out weak devices, and packaged devices rather than bare semiconductor dice are normally burned-in due to the technical and economic challenges of bare die burn-in. Most burn-in failures are device or die related due to weak gate oxide. Burn-in of devices used on multichip modules is typically performed at the assembled module level. The drawback in module level burn-in is that a percentage of the dice in the module will often fail. If a die fails in a multichip module, either that module has to be repaired by replacing the failed die with another good die, or that module must be rejected and discarded. Typically neither option is cost effective.
It is possible to mount a bare semiconductor die to a test circuit substrate, electrically connect the semiconductor die to the test circuit substrate, and perform testing of the die on the test circuit substrate by contacting test pads on the test circuit substrate. However, semiconductor dice are fabricated in a multiplicity of die sizes depending on the functions of the dice. Therefore, a different test circuit substrate is usually necessary for each different size of semiconductor die. Moreover, different semiconductor dice require dissimilar pin outs which means that a customized interconnect test pattern must be generated on the test circuit substrate for each type of semiconductor die.
U.S. Pat. No. 5,002,895 by LeParquier et al. teaches mounting of a semiconductor die on a test frame. The die is then wire bonded to the frame and tested on the frame via test pads on the frame. After testing, the die and the frame are place on a substrate. The wire bonds used to connect the die to the frame to enable testing are used to connect the die to the substrate by a welding method. The wires are cut after soldering to remove the frame from the semiconductor that has been mounted to the substrate. The disadvantage to this method is that the frame is customized for each size of semiconductor die, so that a multiplicity of frames are needed to test a variety of semiconductor die sizes.
It is desirable to test and burn-in semiconductor dice before they are assembled in a multichip module to ensure that only functional dice are used so as to eliminate rework and rejects. It is also desirable to have a generic or universal test circuit substrate for use with any size of semiconductor dice regardless of the pin-out requirements of a specific die.